Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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In this paper an open-loop CMOS voltage buffer is unveiled which features less than -60dB THD within a bandwidth of 100MHz and large-signal gain that departs from unity a maximum of 1.6% within the band. Design methodology and proof-of-concept simulation results of an implementation in 0.35um CMOS are presented.