The design and implementation of a log-structured file system
ACM Transactions on Computer Systems (TOCS)
The LRU-K page replacement algorithm for database disk buffering
SIGMOD '93 Proceedings of the 1993 ACM SIGMOD international conference on Management of data
Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Efficient management for large-scale flash-memory storage systems with resource conservation
ACM Transactions on Storage (TOS)
Hybrid solid-state disks: combining heterogeneous NAND flash in large SSDs
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
I/O Performance Optimization Techniques for Hybrid Hard Disk-Based Mobile Consumer Devices
IEEE Transactions on Consumer Electronics
Morphable memory system: a robust architecture for exploiting multi-level phase change memories
Proceedings of the 37th annual international symposium on Computer architecture
Extending SSD lifetimes with disk-based write caches
FAST'10 Proceedings of the 8th USENIX conference on File and storage technologies
ComboFTL: Improving performance and lifespan of MLC flash memory using SLC flash buffer
Journal of Systems Architecture: the EUROMICRO Journal
AdaMS: adaptive MLC/SLC phase-change memory design for file storage
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
An adaptive write buffer management scheme for flash-based SSDs
ACM Transactions on Storage (TOS)
Delta-FTL: improving SSD lifetime via exploiting content locality
Proceedings of the 7th ACM european conference on Computer Systems
NAND flash memory-based hybrid file system for high I/O performance
Journal of Parallel and Distributed Computing
Exploiting workload dynamics to improve SSD read latency via differentiated error correction codes
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies
Getting real: lessons in transitioning research simulations into hardware systems
FAST'13 Proceedings of the 11th USENIX conference on File and Storage Technologies
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The multi-level cell (MLC) NAND flash memory technology enables multiple bits of information to be stored on a single cell, thus making it possible to increase the density of the memory without increasing the die size. For most MLC flash memories, each cell can be programmed as a single-level cell or a multi-level cell during runtime. Therefore, it has a potential to achieve both the high performance of SLC flash memory and the high capacity of MLC flash memory. In this paper, we present a flexible flash file system, called FlexFS, which takes advantage of the dynamic reconfiguration facility of MLC flash memory. FlexFS divides the flash memory medium into SLC and MLC regions, and dynamically changes the size of each region to meet the changing requirements of applications. We exploit patterns of storage usage to minimize the overhead of reorganizing two different regions. We also propose a novel wear management scheme which mitigates the effect of the extra writes required by FlexFS on the lifetime of flash memory. Our implementation of FlexFS in the Linux 2.6 kernel shows that it can achieve a performance comparable to SLC flash memory while keeping the capacity of MLC flash memory for both simulated and real mobile workloads.