Hardware Compressed Main Memory: Operating System Support and Performance Evaluation
IEEE Transactions on Computers
Symbiotic jobscheduling with priorities for a simultaneous multithreading processor
SIGMETRICS '02 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Memory resource management in VMware ESX server
ACM SIGOPS Operating Systems Review - OSDI '02: Proceedings of the 5th symposium on Operating systems design and implementation
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning
HPCA '02 Proceedings of the 8th International Symposium on High-Performance Computer Architecture
Dynamic tracking of page miss ratio curve for memory management
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Improving NAND Flash Based Disk Caches
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Phase-change random access memory: a scalable technology
IBM Journal of Research and Development
Architecting phase change memory as a scalable dram alternative
Proceedings of the 36th annual international symposium on Computer architecture
A durable and energy efficient main memory using phase change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Scalable high performance main memory system using phase-change memory technology
Proceedings of the 36th annual international symposium on Computer architecture
Evaluation techniques for storage hierarchies
IBM Systems Journal
FlexFS: a flexible flash file system for MLC NAND flash memory
USENIX'09 Proceedings of the 2009 conference on USENIX Annual technical conference
AdaMS: adaptive MLC/SLC phase-change memory design for file storage
Proceedings of the 16th Asia and South Pacific Design Automation Conference
i-NVMM: a secure non-volatile main memory system with incremental encryption
Proceedings of the 38th annual international symposium on Computer architecture
Preventing PCM banks from seizing too much power
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Exploring latency-power tradeoffs in deep nonvolatile memory hierarchies
Proceedings of the 9th conference on Computing Frontiers
Evaluating Dynamics and Bottlenecks of Memory Collaboration in Cluster Systems
CCGRID '12 Proceedings of the 2012 12th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (ccgrid 2012)
Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Leveraging phase change memory to achieve efficient virtual machine execution
Proceedings of the 9th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Memorage: emerging persistent RAM based malleable main memory and storage architecture
Proceedings of the 27th international ACM conference on International conference on supercomputing
Compiler directed write-mode selection for high performance low power volatile PCM
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Phase-change memory: An architectural perspective
ACM Computing Surveys (CSUR)
Reducing writes in phase-change memory environments by using efficient cache replacement policies
Proceedings of the Conference on Design, Automation and Test in Europe
Bit mapping for balanced PCM cell programming
Proceedings of the 40th Annual International Symposium on Computer Architecture
Zombie memory: extending memory lifetime by reviving dead blocks
Proceedings of the 40th Annual International Symposium on Computer Architecture
Dynamically reconfigurable hybrid cache: an energy-efficient last-level cache design
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Approximate storage in solid-state memories
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
An effectiveness-based adaptive cache replacement policy
Microprocessors & Microsystems
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Phase Change Memory (PCM) is emerging as a scalable and power efficient technology to architect future main memory systems. The scalability of PCM is enhanced by the property that PCM devices can store multiple bits per cell. While such Multi-Level Cell (MLC) devices can offer high density, this benefit comes at the expense of increased read latency, which can cause significant performance degradation. This paper proposes Morphable Memory System (MMS), a robust architecture for efficiently incorporating MLC PCM devices in main memory. MMS is based on observation that memory requirement varies between workloads, and systems are typically over-provisioned in terms of memory capacity. So, during a phase of low memory usage, some of the MLC devices can be operated at fewer bits per cell to obtain lower latency. When the workload requires full memory capacity, these devices can be restored to high density MLC operation to have full main-memory capacity. We provide the runtime monitors, the hardware-OS interface, and the detailed mechanism for implementing MMS. Our evaluations on an 8-core 8GB MLC PCM-based system show that MMS provides, on average, low latency access for 95% of all memory requests, thereby improving overall system performance by 40%.