DC offset control with application in a zero-IF 0.18 μm CMOS Bluetooth receiver chain

Authors:
T. Sánchez-Rodríguez;J. Galán;R. G. Carvajal;A. López-Martín;J. Ramírez-Angulo
Affiliations:
Departamento de Ingeniería Electrónica, Escuela Superior de Ingenieros, Universidad de Sevilla, Sevilla, Spain 41092;Departamento de Ingeniería Electrónica, de Sistemas Informáticos y Automática, Universidad de Huelva, Huelva, Spain 21071;Departamento de Ingeniería Electrónica, Escuela Superior de Ingenieros, Universidad de Sevilla, Sevilla, Spain 41092;Departamento de Ingeniería Eléctrica y Electrónica, Universidad Pública de Navarra, Pamplona, Spain 31006;Klipsch School of Electrical Engineering, New Mexico State University, Las Cruces, USA 88003-0001
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2010

Citing 2
Cited 2

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Abstract

A compact DC offset correction circuit based on the intrinsic properties of quasi-floating gate (QFG) transistors is presented. The proposed scheme uses a tuning mechanism to make its initial response faster improving the traditional large settling time of these circuits. A zero-IF baseband receiver chain suitable for Bluetooth that includes the proposed dc offset correction has been designed in a 0.18 μm CMOS technology at 1.2 V supply voltage.