Hardware architecture design of video compression for multimedia communication systems
IEEE Communications Magazine
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H.264/AVC provides high video quality at substantially low bit rates. It is useful for saving and transferring video images by robot cameras. However, the computational complexity of H.264/AVC is very high. A high-speed general-purpose processor is necessary to process H.264/AVC. However, it is difficult to use such a processor for a portable device. Therefore, an application-specific processor is necessary. A dynamic reconfiguration can virtually expand the circuit area in a limited chip area. Therefore, this article proposes a dynamically reconfigurable processor for H.264/AVC image prediction. H.264/AVC contains intra- and inter-prediction processes. The intra- and inter-prediction processes are not used at the same time. The proposed processor was designed and synthesized, and dynamically reconfigures those circuits. As a result, look-up tables (LUTs) were reduced to 93%, flip-flops were reduced to 94%, and the maximum delay was about the same.