Translation-Based Model Checking for PLC Programs
COMPSAC '09 Proceedings of the 2009 33rd Annual IEEE International Computer Software and Applications Conference - Volume 01
An analysis of SAT-based model checking techniques in an industrial environment
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
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The paper presents an approach which combines the formalism of Petri Nets and of model checking in order to deliver correct and dependable PLC programs. Based on SIPNs, a variant of PNs, the complete controller development process from an informal specification to the final implementation on a PLC is discussed. The SIPN formalized according to corresponding plant model enables the derivation of standard functional properties and the specific functional properties of the PLC control algorithm. These properties are verified and validated with the model checker tool Cadence SMV. In order to do this, the SIPN is translated into SMV input code, in which there are inserted the functional properties to be verified and validated, expressed by using Temporal Logic formulae. This correct SIPN is used as a basis for implementation. For the realization there are used standard PLC programming languages according to IEC 61131. It resulted that the approach provides correctness of the resulting PLC programs, which makes them much more dependable than direct implemented PLC code. In order to illustrate the approach steps a working example was used.