Director strings as combinators
ACM Transactions on Programming Languages and Systems (TOPLAS)
LFP '88 Proceedings of the 1988 ACM conference on LISP and functional programming
The essence of compiling with continuations
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Garbage collection: algorithms for automatic dynamic memory management
Garbage collection: algorithms for automatic dynamic memory management
NORMA: a graph reduction processor
LFP '86 Proceedings of the 1986 ACM conference on LISP and functional programming
Dhrystone: a synthetic systems programming benchmark
Communications of the ACM
Computer Architecture; A Quantitative Approach
Computer Architecture; A Quantitative Approach
BWM: A Concrete Machine for Graph Reduction
Proceedings of the 1991 Glasgow Workshop on Functional Programming
The Implementation of Functional Programming Languages (Prentice-Hall International Series in Computer Science)
The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA
Implementation and Application of Functional Languages
The worker/wrapper transformation
Journal of Functional Programming
Introducing the PilGRIM: a processor for executing lazy functional languages
IFL'10 Proceedings of the 22nd international conference on Implementation and application of functional languages
Lazy generation of canonical test programs
IFL'11 Proceedings of the 23rd international conference on Implementation and Application of Functional Languages
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The leading implementations of graph reduction all target conventional processors designed for low-level imperative execution. In this paper, we present a processor specially designed to perform graph-reduction. Our processor -- the Reduceron -- is implemented using off-the-shelf reconfigurable hardware. We highlight the low-level parallelism present in sequential graph reduction, and show how parallel memories and dynamic analyses are used in the Reduceron to achieve an average reduction rate of 0.55 function applications per clock-cycle.