Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder

  • Authors:

  • Hai bing Yin;Honggang Qi;Hui Zhu Jia;Chuang Zhu;Xiao Dong Xie

  • Affiliations:

  • China Jiliang University, Department of Information Engineering, No. 258, Xue yuan street, Xiasha, Hangzhou, Zhejiang 310018, China and National Engineering Laboratory for Video Technology, Peking ...;Graduate University of Chinese Academy of Sciences, Beijing 100049, China;National Engineering Laboratory for Video Technology, Peking University, Beijing 100871, China;National Engineering Laboratory for Video Technology, Peking University, Beijing 100871, China;National Engineering Laboratory for Video Technology, Peking University, Beijing 100871, China

  • Venue:
  • Image Communication
  • Year:
  • 2010

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Abstract

There are abundant intra and inter prediction modes in the AVS video coding standard. Rate distortion optimized mode decision can fully utilize this flexibility to improve the spatio-temporal prediction efficiency and maximize the coding efficiency. However, the implementation complexity is dramatically high due to huge throughput burden. Hardware oriented mode decision algorithm is tailored for VLSI implementation in this work for high definition video coding. Mode preselection is employed to alleviate the dramatic throughout burden. Also, intelligent pipeline scheduling mechanism is proposed to break the intrinsic data dependency in intra prediction, which is directly related with mode decision. The proposed simplified algorithm is well-suited for hardware implementation with small performance penalty. Finally, the VLSI architecture is proposed with good trade off between circuit consumption and rate distortion performance.