The shifting bottleneck procedure for job shop scheduling
Management Science
A backward approach in list scheduling algorithms for multi-machine tardiness problems
Computers and Operations Research
Scheduling jobs on parallel machines applying neural network and heuristic rules
Computers and Industrial Engineering
A tabu search algorithm for parallel machine total tardiness problem
Computers and Operations Research
Scheduling jobs on parallel machines with setup times and ready times
Computers and Industrial Engineering
Computers and Operations Research
Multiple-objective scheduling and real-time dispatching for the semiconductor manufacturing system
Computers and Operations Research
Group shops scheduling with makespan criterion subject to random release dates and processing times
Computers and Operations Research
Journal of Intelligent Manufacturing
Proceedings of the Winter Simulation Conference
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This paper focuses on a scheduling problem in a semiconductor wafer probing facility. In the probing facility, wafer lots with distinct ready times are processed on a series of workstations, each with identical parallel machines. We develop a heuristic algorithm for the problem with the objective of minimizing total tardiness of orders. The algorithm employs a bottleneck-focused scheduling method, in which a schedule at the bottleneck workstation is constructed first and then schedules for other workstations are constructed based on the schedule at the bottleneck. For scheduling wafer lots at the bottleneck workstation, we consider prospective tardiness of the lots as well as sequence-dependent setup times required between different types of wafer lots. We also present a rolling horizon method for implementation of the scheduling method on a dynamic situation. The suggested methods are evaluated through a series of computational experiments and results show that the methods work better than existing heuristic methods.