Learning regular sets from queries and counterexamples
Information and Computation
STATEMATE: A Working Environment for the Development of Complex Reactive Systems
IEEE Transactions on Software Engineering
Inference of finite automata using homing sequences
Information and Computation
Theoretical Computer Science
Temporal proof methodologies for timed transition systems
Information and Computation
An introduction to computational learning theory
An introduction to computational learning theory
UPPAAL—a tool suite for automatic verification of real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
An experiment in automatic generation of test suites for protocols with verification technology
Science of Computer Programming - Special issue on COST 247, verification and validation methods for formal descriptions
Event-clock automata: a determinizable class of timed automata
Theoretical Computer Science
Model checking
Bandera: extracting finite-state models from Java source code
Proceedings of the 22nd international conference on Software engineering
Theoretical Computer Science
Model Generation by Moderated Regular Extrapolation
FASE '02 Proceedings of the 5th International Conference on Fundamental Approaches to Software Engineering
Logic Verification of ANSI-C Code with SPIN
Proceedings of the 7th International SPIN Workshop on SPIN Model Checking and Software Verification
The Regular Real-Time Languages
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Timing Assumptions and Verification of Finite-State Concurrent Systems
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Specifying Timed State Sequences in Powerful Decidable Logics and Timed Automata
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
FTRTFT '96 Proceedings of the 4th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Kronos: A Model-Checking Tool for Real-Time Systems
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems
Testing Software Design Modeled by Finite-State Machines
IEEE Transactions on Software Engineering
Regular inference for state machines using domains with equality tests
FASE'08/ETAPS'08 Proceedings of the Theory and practice of software, 11th international conference on Fundamental approaches to software engineering
On the correspondence between conformance testing and regular inference
FASE'05 Proceedings of the 8th international conference, held as part of the joint European Conference on Theory and Practice of Software conference on Fundamental Approaches to Software Engineering
Inference of event-recording automata using timed decision trees
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
An efficient algorithm for learning event-recording automata
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
| Hi-index | 5.23 |
In regular inference, a regular language is inferred from answers to a finite set of membership queries, each of which asks whether the language contains a certain word. One of the most well-known regular inference algorithms is the L^* algorithm due to Dana Angluin. However, there are almost no extensions of these algorithms to the setting of timed systems. We extend Angluin's algorithm for on-line learning of regular languages to the setting of timed systems. Since timed automata can freely use an arbitrary number of clocks, we restrict our attention to systems that can be described by deterministic event-recording automata (DERAs). We present three algorithms, TL"s"g^*, TL"n"s"g^* and TL"s^*, for inference of DERAs. In TL"s"g^* and TL"n"s"g^*, we further restrict event-recording automata to be event-deterministic in the sense that each state has at most one outgoing transition per action; learning such an automaton becomes significantly more tractable. The algorithm TL"n"s"g^* builds on TL"s"g^*, by attempts to construct a smaller (in number of locations) automaton. Finally, TL"s^* is a learning algorithm for a full class of deterministic event-recording automata, which infers a so called simple DERA, which is similar in spirit to the region graph.