Bridging physical and virtual worlds with electronic tags
Proceedings of the SIGCHI conference on Human Factors in Computing Systems
Inferring Activities from Interactions with Objects
IEEE Pervasive Computing
RFID: A Technical Overview and Its Application to the Enterprise
IT Professional
Ultra low-power 12-bit SAR ADC for RFID applications
Proceedings of the Conference on Design, Automation and Test in Europe
A 54.2 μW 5 MSps 9-bit ultra-low energy analog-to-digital converter in 180 nm technology
Analog Integrated Circuits and Signal Processing
Adaptive successive approximation ADC for biomedical acquisition system
Microelectronics Journal
Design considerations of calibration DAC in self-calibrated SAR A/D converters
Microelectronics Journal
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The design and first measuring results of an ultra-low power 12 bit successive-approximation ADC for autonomous multi-sensor systems are presented. The comparator and the DAC are optmised for low power consumption. The power consumption is 0.52@mW from a 1.2V supply with a sample clock of 3.125kHz and 0.85@mW at 6.25kHz. This gives 136pJ per conversion or 66fJ per conversion step. As per authors' knowledge, 66fJ per conversion step is the best reported so far. The ADC was realised in the NXP CMOS 0.14@mm technology; the area was 0.35mm^2. Only four metal layers were used in order to allow 3D integration of the sensors.