Ultra low-power 12-bit SAR ADC for RFID applications

  • Authors:
  • Daniela De Venuto;Eduard Stikvoort;David Tio Castro;Youri Ponomarev

  • Affiliations:
  • DEE Politecnico di Bari, Italy;NXP Semiconductors, Eindhoven, The Netherlands;NXP Semiconductors, Leuven, Belgium;NXP Semiconductors, Leuven, Belgium

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2010

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Abstract

The design and first measuring results of an ultra-low power 12bit Successive-Approximation ADC for autonomous multi-sensor systems are presented. The comparator and the DAC are optmised for the lowest power consumption. The proposed design has a power consumption of 0.52μW at a bitclock of 50-kHz and of 0.85μW at 100-kHz with a 1.2-V supply. As far as we know, the Figure-of-Merit of 66 fJ/convertion-step is the best reported so far. The ADC was realised in the NXP CMOS 0.14μm technology with an area of 0.35 mm2. Only four metal layers were used in order to allow 3D integration of the sensors.