Scenario-based analysis and synthesis of real-time systems using UPPAAL

Authors:
Kim G. Larsen;Shuhao Li;Brian Nielsen;Saulius Pusinskas
Affiliations:
Aalborg University, Aalborg, Denmark;Aalborg University, Aalborg, Denmark;Aalborg University, Aalborg, Denmark;Aalborg University, Aalborg, Denmark
Venue:
Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2010

Citing 9
Cited 4

A theory of timed automata

Theoretical Computer Science
Smart Play-out of Behavioral Requirements

FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine

Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine
Smart Play-Out Extended: Time and Forbidden Elements

QSIC '04 Proceedings of the Quality Software, Fourth International Conference
Model Checking Live Sequence Charts

ICECCS '05 Proceedings of the 10th IEEE International Conference on Engineering of Complex Computer Systems
Controller Synthesis from LSC Requirements

FASE '09 Proceedings of the 12th International Conference on Fundamental Approaches to Software Engineering: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
UPPAAL-Tiga: time for playing games!

CAV'07 Proceedings of the 19th international conference on Computer aided verification
Synthesis of distributed processes from scenario-based specifications

FM'05 Proceedings of the 2005 international conference on Formal Methods
Synthesis revisited: generating statechart models from scenario-based requirements

Formal Methods in Software and Systems Modeling

Scenario-based verification of real-time systems using Uppaal

Formal Methods in System Design
Synthesis from scenario-based specifications

Journal of Computer and System Sciences
An iterative approach to synthesize business process templates from compliance rules

Information Systems
Counter play-out: executing unrealizable scenario-based specifications

Proceedings of the 2013 International Conference on Software Engineering

Quantified Score

Hi-index	0.00

Visualization

Abstract

We propose an automated, tool-supported approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-object behaviors of a system are modeled as a set of live sequence charts (LSCs), and the scenario-based user requirement is specified as a separate LSC. By translating the set of LSC charts into a behavior-equivalent network of timed automata (TA), we reduce the problems of model consistency checking and property verification to classical CTL real-time model checking problems, and reduce the problem of centralized synthesis for open systems to a timed game solving problem. We implement a prototype LSC-to-TA translator, which can be linked to existing real-time model checker Uppaal and timed game solver Uppaal-Tiga. Preliminary experiments on a number of examples show that it is a viable approach.