An embedded wide-range and high-resolution CLOCK jitter measurement circuit

  • Authors:
  • Yu Lee;Ching-Yuan Yang;Nai-Chen Daniel Cheng;Ji-Jan Chen

  • Affiliations:
  • Industrial Technology Research Institute, Hsinchu, Taiwan and National Chung Hsing University, Taichung, Taiwan;National Chung Hsing University, Taichung, Taiwan;Industrial Technology Research Institute, Hsinchu, Taiwan;Industrial Technology Research Institute, Hsinchu, Taiwan

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2010

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Abstract

The paper describes an embedded circuit for the single shot jitter measurement of the clock signal. Based on a jitter amplified technique with a pulse removing mechanism, the picosecond level resolution is achieved in the wide frequency range. In addition, a gain-locked loop calibration scheme is proposed to keep the amplification ratio constant under PVT variations. Fabricated by 0.13-um CMOS process, the tested circuit can achieve a resolution of 2 ps root mean square (rms) jitter at an input range from few tens of megahertz to 1.6 GHz.