Dynamic voltage scaling and power management for portable systems
Proceedings of the 38th annual Design Automation Conference
Conserving network processor power consumption by exploiting traffic variability
ACM Transactions on Architecture and Code Optimization (TACO)
Proceedings of the 46th Annual Design Automation Conference
Traffic-aware power optimization for network applications on multicore servers
Proceedings of the 49th Annual Design Automation Conference
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We design, implement and evaluate a power-efficient and traffic-aware transcoding system on multicore servers that appropriately adjusts the processor operating level. The system is capable of configuring the number of active cores and core frequency "on-the-fly" according to the varying traffic rate. Results on an AMD machine show that our system saves 51.0% power consumption compared to a native system without power-saving schemes. It also outperforms three other power-aware systems, CG [2] (clock gating), C-DVFS [3] (chip-wide DVFS) and Hybrid [1] (chip-wide DVFS + power-gating), by 19.5%, 10.5% and 5.5% reduction of power consumption, respectively.