Robustness testing of composed real-time systems

Authors:
Hacène Fouchal;Antoine Rollet;Abbas Tarhini
Affiliations:
(Correspd. E-mail: Hacene.Fouchal@univ-reims.fr) CRESTIC, Université de Reims Champagne Ardenne, BP 1039 F-51687 Reims Cedex, France;LABRI/CNRS (UMR5800), Université de Bordeaux, 33405 Talence Cedex, France;Lebanese American University, Beirut, Lebanon
Venue:
Journal of Computational Methods in Sciences and Engineering - Special Supplement Issue in Section A and B: Selected Papers from the ISCA International Conference on Software Engineering and Data Engineering, 2009
Year:
2010

Citing 10
Cited 0

Fault Injection Experiments Using FIAT

IEEE Transactions on Computers
A theory of timed automata

Theoretical Computer Science
Component software: beyond object-oriented programming

Component software: beyond object-oriented programming
Using Heavy-Ion Radiation to Validate Fault-Handling Mechanisms

IEEE Micro
Architectural Mismatch: Why Reuse Is So Hard

IEEE Software
Architectural Mismatch: Why Reuse Is So Hard

IEEE Software
An approach towards benchmarking of fault-tolerant commercial systems

FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Automated Robustness Testing of Off-the-Shelf Software Components

FTCS '98 Proceedings of the The Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing
A framework and a tool for robustness testing of communicating software

Proceedings of the 2007 ACM symposium on Applied computing
A model-based approach for robustness testing

TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

In this paper, we suggest a methodology for testing robustness of Real-Time Component-Based Systems (RTCBS). A RTCBS system is described as a collection of components where each component is modeled as a Timed Input-Output Automaton (TIOA). For each component, we handle two specifications: a nominal one and a degraded one. We extract test sequences from the nominal specification and we inject automatically faults in order to model hostile environments. Then we present an adequate test architecture consisting of the System Under Test (SUT) of components, and a distributed tester that consists of a set of coordinating testers. Each tester is dedicated to test a single SUT component. A test execution algorithm is presented. Testing the SUT is divided into two phases. In the first phase, the tester executes the generated test sequences of each component in isolation and records the feedback of this experimentation. The robustness is checked by verifying if the recorded results are accepted by the degraded specification of each component. If all components are robust according to the inserted hazards, we check the robustness of communications between components respecting the same process described before.