Workload characterization and its impact on multicore platform design
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
"It's a small world after all": noc performance optimization via long-range link insertion
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems
IEEE Transactions on Computers
Hi-index | 0.00 |
This special session considers a holistic approach to the on-chip network paradigm and identifies a few critical issues related to the theoretical basis (e.g. graph theory, stochastic modeling and analysis), essential properties (e.g. structure, hierarchy, heterogeneity, dynamics, communication paradigm), and optimization metrics (e.g. energy, fault-tolerance, robustness, cost, performance) of designing and characterizing the communication infrastructure of future multi-core systems. Towards this end, this session consists of three forward-looking talks (going from the substrate-, all the way up to the application-level) addressing these fundamental challenges and opportunities.