Toward a dataflow/von Neumann hybrid architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
I-structures: data structures for parallel computing
ACM Transactions on Programming Languages and Systems (TOPLAS)
An architecture of a dataflow single chip processor
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Can dataflow subsume von Neumann computing?
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Executing a Program on the MIT Tagged-Token Dataflow Architecture
IEEE Transactions on Computers
Journal of Parallel and Distributed Computing - Special issue: data-flow processing
Journal of Parallel and Distributed Computing - Special issue on shared-memory multiprocessors
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In order to achieve implementation control in a dataflow architecture, it is necessary to bring data streams under control and branch them in accord with prevailing conditions. This study suggests methodologies for modeling and formulating the control overhead of data streams. From these methodologies, techniques are derived to minimize overhead. In order to verify the practicality of these techniques, they were first applied to three representative Japanese dataflow architectures to show their basic ability to reduce overhead, and for further verification, they were next applied to several real applications to test their more specific abilities, as well as their value as techniques for optimizing compilation.