Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Heuristics for the global optimization of microprograms
MICRO 13 Proceedings of the 13th annual workshop on Microprogramming
Global optimization of microprograms through modular control constructs
MICRO 12 Proceedings of the 12th annual workshop on Microprogramming
An improvement of trace scheduling for global microcode compaction
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
URPR—An extension of URCR for software pipelining
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
A case study in signal processing microprogramming using the URPR software pipelining technique
MICRO 19 Proceedings of the 19th annual workshop on Microprogramming
GURPR - a method for Global Software pipelining
ACM SIGMICRO Newsletter
An algorithm for microcode compaction of VHDL behavioral descriptions
ACM SIGMICRO Newsletter
The trap as a control flow mechanism
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
A data-flow driven resource allocation in a retargetable microcode compiler
MICRO 21 Proceedings of the 21st annual workshop on Microprogramming and microarchitecture
Generating compilers for generated datapaths
EURO-DAC '94 Proceedings of the conference on European design automation
An algorithm for microcode compaction of VHDL behavioral descriptions
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
GURPR—a method for global software pipelining
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Phase coupling for horizontal microcode generation
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Phase coupling for horizontal microcode generation
ACM SIGMICRO Newsletter
Hi-index | 0.00 |
Global microcode compaction is an open problem in firmware engineering. Although Fisher's trace scheduling method may produce significant reductions in the execution time of compacted microcode, it has some drawbacks. There have been four methods. Tree, SRDAG, ITSC , and GDDG, presented recently to mitigate those drawbacks in different ways.The purpose of the research reported in this paper is to evaluate these new methods. In order to do this, we have tested the published algorithms on several unified microcode sequences of two real machines and compared them on the basis of the results of experiments using three criteria: time efficiency, space efficiency, and complexity.