Product families on-chip: combining the software product family paradigm with run-time reprogrammable hardware technology

  • Authors:
  • Michel Jaring

  • Affiliations:
  • VTT Electronics, Software Architectures Research Group, Oulu, Finland

  • Venue:
  • COMPSAC-W'05 Proceedings of the 29th annual international conference on Computer software and applications conference
  • Year:
  • 2005

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Abstract

Hardware and software can be co-designed as a single system to obtain high-performance computing solutions that use a minimum of resources such as CPU cycles and memory. Hardware/software co-design is often a complex and time consuming process. Software functionality is typically developed independently from hardware functionality and functional elements are not reused across similar products. Co-design is particularly important in System on-Chip (SoC) development where an entire system consisting of both software and hardware is integrated on a single chip. Developing high-performance computing solutions in the form of SoCs in a repeatable manner is technically possible, but knowing how to apply software concepts in a hardware context and vice versa is still demanding at best. This paper summarizes the concepts and considerations that outline a case study that aims at combining the software product family paradigm with run-time reprogrammable hardware technology. The goal of the study is to define a formal framework for developing product families on-chip in a repeatable manner.