EMI-resistant CMOS differential input stages

  • Authors:
  • Jean-Michel Redouté;Michiel S. J. Steyaert

  • Affiliations:
  • Department of Electrotechnical Engineering, ESAT, MICAS, Katholieke Universiteit Leuven, Leuven, Belgium;Department of Electrotechnical Engineering, ESAT, MICAS, Katholieke Universiteit Leuven, Leuven, Belgium

  • Venue:
  • IEEE Transactions on Circuits and Systems Part I: Regular Papers
  • Year:
  • 2010

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Abstract

This paper studies and compares the performances of CMOS differential input stages with a high degree of immunity against electromagnetic interferences (EMIs) and introduces a source-buffered differential pair which is very resistant to EMI coupled at its inputs. The EMI behavior of this source-buffered differential-pair topology has been evaluated with a test chip: When injecting an EMI signal of 750 mV rms at the input terminals, the measured maximal EMI-induced input offset voltage corresponds to 116 mV for the source-buffered topology compared with 610 mV for the classic differential pair, which constitutes a major improvement.