Signals & systems (2nd ed.)
Software radio: a modern approach to radio engineering
Software radio: a modern approach to radio engineering
Noise in current-commutating passive FET mixers
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback
Analog Integrated Circuits and Signal Processing
A 0.1---4 GHz SDR receiver with reconfigurable 10---100 MHz signal bandwidth in 65 nm CMOS
Analog Integrated Circuits and Signal Processing
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The performance of zero-IF receivers with current-driven passive mixers driven by 25% duty-cycle quadrature clocks is studied and analyzed. It is shown that, in general, these receivers outperform the ones that utilize passive mixers with 50% duty-cycle clocks. The known problems in receivers with 50% duty-cycle mixers, such as having unequal high- and low-side conversion gains, unexpected IIP2 and IIP3 numbers, and IQ crosstalk, are significantly lowered due to the operating principles of the 25% duty-cycle passive mixer. It is revealed that with an intelligent sizing of the design parameters, the 25%-duty-cycle-mixer-based receiver is superior in terms of linearity, noise, and elimination of IQ crosstalk.