Handbook of mathematics (3rd ed.)
Handbook of mathematics (3rd ed.)
Digital Signal Processing with Field Programmable Gate Arrays
Digital Signal Processing with Field Programmable Gate Arrays
An interpolating digitally controlled oscillator for a wide-range all-digital PLL
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Flicker noise in observer-controller digital PLL
IEEE Transactions on Circuits and Systems II: Express Briefs
International Journal of Computer Applications in Technology
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In this paper, an all-digital phase-locked loop (ADPLL) is presented, and it is implemented on a field-programmable gate array. All components like the phase detector (PD), oscillator, and loop filter are realized as digital discrete-time components fed from analog-to-digital converters. The phase detection is realized by generating first an analytic signal using a compact implementation of the Hilbert transform and then computing the instantaneous phase with the CORDIC algorithm. A phase-unwrap component was realized, which extends the linear range of the PD, so that the linear model is valid in the full frequency range. This property leads to a constant lock-in time for arbitrary frequency changes. An analytic solution for the lock-in frequency range and the stability range including processing delays is given. All relations to design an ADPLL of the presented structure are derived. A detailed example application of an ADPLL designed as an offset local oscillator is given.