Queue management for shared buffer and shared multi-buffer ATM switches

  • Authors:

  • Yu-Sheng Lin;C. Bernard Shung

  • Affiliations:

  • Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, R.O.C.;Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, R.O.C.

  • Venue:
  • INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 2
  • Year:
  • 1996

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Abstract

The design of the queue manager is of key importance for the shared buffer ATM switch architectures. In this paper, we propose the recycling queue manager (RQM) with reduced hardware complexity by eliminating the external FIFO for the avail queue. By separating the shared buffer into cell and address memories, the power consumption of idle accesses in RQM can be reduced, and the linked list bubbles can be removed. The required storage for the proposed RQM and other queue managers of existing shared buffer ATM switches are compared, considering delay/loss priorities and partial sharing. It is found that RQM requires the least storage size for most cases, and the reduction is more significant as switch dimension grows. A two-level RQM-based scheme, with reduced storage, is also proposed for the shared multi-buffer switch architecture. An RQM prototype chip supporting a 16×16 switch with two priority classes and back pressure capability was implemented and successfully tested to verify the proposed architecture