Measures of the Effectiveness of Fault Signature Analysis
IEEE Transactions on Computers
| Hi-index | 0.00 |
Continuously monitored burn-in and life tests of multi-output devices like ASIC's, microprocessors etc. are becoming major issues. Partly due to the change in design responsibilities and partly due to emerging problems like soft-errors, the need for advanced burn-in and life test systems for use in design verification and quality assurance exists in many organizations. Present system architectures in this field are aimed at burn-in of memory devices having one or only few output pins per device, but such systems do not lend themselves towards efficient burn-in and life test of multi output devices, for example many ASIC's. This paper describes a novel burn-in system approach, using data-compaction, test generation tools, and a flexible, general purpose test system architecture. The approach offers true output monitoring of multi-output devices, featuring monitoring capabilities of 1-2000 test points per burn-in board. The approach is also well suited for testing of analog parts during burn-in, or may find usage for individual stimuli of ECL parts.