Built-in test compiler in an ASIC environment

  • Authors:

  • Eric Archambeau;Ken Van Egmond

  • Affiliations:

  • VLSI Technology Inc., San Jose, California;VLSI Technology Inc., San Jose, California

  • Venue:
  • ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
  • Year:
  • 1988

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Abstract

This paper describes a built-in test (BIT) block compiler, integrated into VLSI Technology's set of design tools. One module of the BIT compiler generates both a structural description and a behavorial simulation model for pseudo-random pattern generators and signature analyzers, based on a linear feedback shift register (LFSR) technique. The details of this module and a technique for merging the built-in test into a complete ASIC test program are shown.