A reuse approach for FPGA-based SDR waveforms

  • Authors:

  • Kevin Skey;John Bradley;Karl Wagner

  • Affiliations:

  • The MITRE Corporation, Bedford, MA;The MITRE Corporation, Bedford, MA;The MITRE Corporation, Bedford, MA

  • Venue:
  • MILCOM'06 Proceedings of the 2006 IEEE conference on Military communications
  • Year:
  • 2006

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Abstract

Software targeting general purpose processing (GPP) elements has been successfully reused for software defined radio (SDR) platforms in support of low-bandwidth waveforms. The Joint Tactical Radio System (JTRS) Software Communications Architecture (SCA) promotes reuse of GPP-based software by providing a consistent framework for developing reusable waveform implementations. However, high-bandwidth waveforms, such as those used in above 2 GHz MILSATCOM terminals, overwhelm the capabilities of GPP-only radios making field programmable gate arrays (FPGAs) a necessity in high-bandwidth radio systems. The SCA does not address the development of reusable FPGA-based waveform implementations. This paper presents an approach supplementing the current SCA to address FPGA-based platforms using System-on-a-Chip (SoC) best practices for design reuse, including common interfaces and a robust system simulation environment.