GCA: Global Cellular Automata. A Flexible Parallel Model
PaCT '01 Proceedings of the 6th International Conference on Parallel Computing Technologies
GCA: A Massively Parallel Model
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
FPGA Implementations of the Massively Parallel GCA Model
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
Theory of Self-Reproducing Automata
Theory of Self-Reproducing Automata
Generated Horizontal and Vertical Data Parallel GCA Machines for the N-Body Force Calculation
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
The GCA-w Massively Parallel Model
PaCT '09 Proceedings of the 10th International Conference on Parallel Computing Technologies
Multilane single GCA-w based expressway traffic model
ACRI'10 Proceedings of the 9th international conference on Cellular automata for research and industry
The massively parallel computing model GCA
Euro-Par 2010 Proceedings of the 2010 conference on Parallel processing
Hirschberg's algorithm on a GCA and its parallel hardware implementation
Euro-Par'07 Proceedings of the 13th international Euro-Par conference on Parallel Processing
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The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical CA model. In differentiation to the CA model the neighbors are not fixed and local, they are variable and global. The GCA model is applicable to a wide range of parallel algorithms. In this paper a multiprocessor architecture for the massively parallel GCA model is presented. In contrast to a special purpose implementation of a GCA algorithm the multiprocessor system allows the implementation in a flexible way through programming. The architecture mainly consists of a number of cell processors and a network. The cell processors are dedicated RISC processors, the network is a crossbar implemented with multiplexers. Only read-accesses through the network are necessary in the GCA model leading to a simplified structure. A system with 32 processors was implemented as a prototype on a FPGA. The analysis and implementation results have shown that the performance of the system scales very well with the number of processors.