Case study: system model of crane and embedded control
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Piranha: a scalable architecture based on single-chip multiprocessing
Proceedings of the 27th annual international symposium on Computer architecture
System design based on single language and single-chip Java ASIP microcontroller
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Moving Java into Mobile Phones
Computer
Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture
Proceedings of the 30th annual international symposium on Computer architecture
CACO-PS: A General Purpose Cycle-Accurate Configurable Power Simulator
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
Proceedings of the 42nd annual Design Automation Conference
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This work presents the development of a coarse grain reconfigurable unit to be coupled to a native Java microcontroller, which is designed for an optimized execution of the embedded application. Code fragments to be accelerated through this unit are identified by profiling the application. The unit is able to explore ILP in a simple way and allows for Java compatibility, while also reducing the number of executed instructions, thus improving the performance with simultaneous energy savings. In many cases, as demonstrated by experiments, it also allows for smaller power consumption.