A novel intermittent fault Markov model for deep sub-micron processors
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
| Hi-index | 0.00 |
Advances in DSM technologies have a negative impact on yield and reliability of digital circuits. On-line self-testing is an interesting solution for detecting permanent and intermittent faults in non safety critical and real-time embedded multiprocessors. In this paper, we describe and evaluate three scheduling and allocation policies for on-line self-testing. We show that a policy that periodically applies a test procedure to the different processors in a way that considers idle times, test history of processors and task priorities offers a good trade-off between performance and fault detection probability.