The convergence behaviour of preconditioned CG and CG-S in the presence of rounding errors
Proceedings of a conference on Preconditioned conjugate gradient methods
Performance issues for iterative solvers in device simulation
SIAM Journal on Scientific Computing - Special issue on iterative methods in numerical linear algebra; selected papers from the Colorado conference
An Approximate Minimum Degree Ordering Algorithm
SIAM Journal on Matrix Analysis and Applications
Iterative methods for solving linear systems
Iterative methods for solving linear systems
An object-oriented framework for block preconditioning
ACM Transactions on Mathematical Software (TOMS)
A Supernodal Approach to Sparse Partial Pivoting
SIAM Journal on Matrix Analysis and Applications
The Design and Use of Algorithms for Permuting Large Entries to the Diagonal of Sparse Matrices
SIAM Journal on Matrix Analysis and Applications
A Scalable Parallel Algorithm for Incomplete Factor Preconditioning
SIAM Journal on Scientific Computing
Iterative Methods for Sparse Linear Systems
Iterative Methods for Sparse Linear Systems
A column approximate minimum degree ordering algorithm
ACM Transactions on Mathematical Software (TOMS)
Multilevel Preconditioners Constructed From Inverse-Based ILUs
SIAM Journal on Scientific Computing
Journal of Computational Physics
Hi-index | 0.00 |
We present a new supernode-based incomplete LU factorization method to construct a preconditioner for solving sparse linear systems with iterative methods. The new algorithm is primarily based on the ILUTP approach by Saad, and we incorporate a number of techniques to improve the robustness and performance of the traditional ILUTP method. These include new dropping strategies that accommodate the use of supernodal structures in the factored matrix and an area-based fill control heuristic for the secondary dropping strategy. We present numerical experiments to demonstrate that our new method is competitive with the other ILU approaches and is well suited for modern architectures with memory hierarchy.