Data race avoidance and replay scheme for developing and debugging parallel programs on distributed shared memory systems

  • Authors:

  • Yung-Chang Chiu;Ce-Kuen Shieh;Tzu-Chi Huang;Tyng-Yeu Liang;Kuo-Chih Chu

  • Affiliations:

  • Department of Electrical Engineering, National Cheng Kung University, No. 1, Ta-Hsueh Rd, Tainan 701, Taiwan;Department of Electrical Engineering, National Cheng Kung University, No. 1, Ta-Hsueh Rd, Tainan 701, Taiwan;Department of Electronic Engineering, Lunghwa University of Science and Technology, Taoyuan 33306, Taiwan;Department of Electrical Engineering, National Kaohsiung University of Applied Sciences, No. 415, Chien Kung Rd, Sanmin District, Kaohsiung 80778, Taiwan;Department of Electronic Engineering, Lunghwa University of Science and Technology, Taoyuan 33306, Taiwan

  • Venue:
  • Parallel Computing
  • Year:
  • 2011

Quantified Score

Hi-index 0.00

Visualization

Abstract

Distributed shared memory (DSM) allows parallel programs to run on distributed computers by simulating a global virtual shared memory, but data racing bugs may easily occur when the threads of a multi-threaded process concurrently access the physically distributed memory. Earlier tools to help programmers locate data racing bugs in non-DSM parallel programs are not easily applied to DSM systems. This study presents the data race avoidance and replay scheme (DRARS) to assist debugging parallel programs on DSM or multi-core systems. DRARS is a novel tool which controls the consistency protocol of the target program, automatically preventing a large class of data racing bugs when the parallel program is subsequently run, obviating much of the need for manual debugging. For data racing bugs that cannot be avoided automatically, DRARS performs a deterministic replay-type function on DSM systems, faithfully reproducing the behavior of the parallel program during run time. Because one class of data racing bugs has already been eliminated, the remaining manual debugging task is greatly simplified. Unlike previous debugging methods, DRARS does not require that the parallel program be written in a specific style or programming language. Moreover, DRARS can be implemented in most consistency protocols. In this paper, DRARS is realized and verified in real experiments using the eager release consistency protocol on a DSM system with various applications.