LSCs: Breathing Life into Message Sequence Charts
Formal Methods in System Design
Events and Constraints: A Graphical Editor for Capturing Logic Requirements of Programs
RE '01 Proceedings of the Fifth IEEE International Symposium on Requirements Engineering
TURTLE: A Real-Time UML Profile Supported by a Formal Validation Toolkit
IEEE Transactions on Software Engineering
From UML/SysML to Matlab/Simulink: current state and future perspectives
Proceedings of the conference on Design, automation and test in Europe: Proceedings
TTool for DIPLODOCUS: an environment for design space exploration
NOTERE '08 Proceedings of the 8th international conference on New technologies in distributed systems
OMEGA2: A New Version of the Profile and the Tools
ICECCS '10 Proceedings of the 2010 15th IEEE International Conference on Engineering of Complex Computer Systems
Formal verification of components assembly based on SysML and interface automata
Innovations in Systems and Software Engineering
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Using UML or SysML models in a verification-centric method requires a property expression language, a formal semantics, and a tool. The paper introduces TEPE, a graphical TEmporal Property Expression language based on SysML parametric diagrams. TEPE enriches the expressiveness of other common property languages in particular with the notion of physical time and unordered signal reception. TEPE is further instantiated in the AVATAR real-time UML profile. TTool, an open-source toolkit, implements a press-button approach for the formal verification of AVATAR-TEPE properties with UPPAAL. An elevator system serves as example