“Sometimes” and “not never” revisited: on branching versus linear time temporal logic
Journal of the ACM (JACM) - The MIT Press scientific computation series
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
On formalizing UML with high-level petri nets
Concurrent object-oriented programming and petri nets
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Model Checking - Timed UML State Machines and Collaborations
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
vUML: A Tool for Verifying UML Models
ASE '99 Proceedings of the 14th IEEE international conference on Automated software engineering
Modeling Behavioral Patterns of Concurrent Objects Using Petri Nets
ISORC '06 Proceedings of the Ninth IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing
Coloured Petri Nets and CPN Tools for modelling and validation of concurrent systems
International Journal on Software Tools for Technology Transfer (STTT)
Simulation-based analysis of UML statechart diagrams: methods and case studies
Software Quality Control
Coloured Petri Nets: Modelling and Validation of Concurrent Systems
Coloured Petri Nets: Modelling and Validation of Concurrent Systems
Formalising UML state machines for model checking
UML'99 Proceedings of the 2nd international conference on The unified modeling language: beyond the standard
Experiences in model driven verification of behavior with UML
Monterey'08 Proceedings of the 15th Monterey conference on Foundations of Computer Software: future Trends and Techniques for Development
Formalizing non-concurrent UML state machines using colored petri nets
ACM SIGSOFT Software Engineering Notes
Towards a generic verification methodology for system models
Proceedings of the Conference on Design, Automation and Test in Europe
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In spite of its informal semantics and of some ambiguities, UML is a widespread modelling language used in both industry and academia. On the other hand, Petri nets are a mathematical modelling language with a formal semantics and are well suited for formal verification. However, altough there is a growing interest in model checking techniques from industry, the software engineers continue to be unfamiliar with such a formalism. For that reason, it is convenient to supply formal verification techniques of UML diagrams that are completely automatic and transparent to the designer. This is the issue discussed in this paper. We propose to translate UML state diagrams into Coloured Petri nets on which verification of some desired properties can be checked automatically. We show on our example that, when expected properties are not checked, this is an opportunity to revise the model into a more adequate one