Towards a generic verification methodology for system models

  • Authors:

  • Robert Wille;Martin Gogolla;Mathias Soeken;Mirco Kuhlmann;Rolf Drechsler

  • Affiliations:

  • University of Bremen, Bremen, Germany;University of Bremen, Bremen, Germany;University of Bremen, Bremen, Germany and Cyber-Physical Systems, Bremen, Germany;University of Bremen, Bremen, Germany;University of Bremen, Bremen, Germany and Cyber-Physical Systems, Bremen, Germany

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2013

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Abstract

The use of modeling languages such as UML or SysML enables to formally specify and verify the behavior of digital systems already in the absence of a specific implementation. However, for each modeling method and verification task usually a separate verification solution has to be applied today. In this paper, a methodology is envisioned that aims at stopping this "inflation" of different verification approaches and instead employs a generic methodology. For this purpose, a given specification as well as the verification shall be transformed into a basic model which itself is specified by means of a generic modeling language. Then, a range of automatic reasoning engines shall uniformly be applied to perform the actual verification. A feasibility study demonstrates the applicability of the envisioned approach.