The Calculus of Computation: Decision Procedures with Applications to Verification
The Calculus of Computation: Decision Procedures with Applications to Verification
Decision Procedures: An Algorithmic Point of View
Decision Procedures: An Algorithmic Point of View
25 Years of Model Checking
Lemmas on demand for the extensional theory of arrays
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
BTOR: bit-precise modelling of word-level problems for model checking
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
BTOR: bit-precise modelling of word-level problems for model checking
SMT '08/BPR '08 Proceedings of the Joint Workshops of the 6th International Workshop on Satisfiability Modulo Theories and 1st International Workshop on Bit-Precise Reasoning
Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Test generation to expose changes in evolving programs
Proceedings of the IEEE/ACM international conference on Automated software engineering
Experimental comparison of concolic and random testing for java card applets
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
A precise memory model for low-level bounded model checking
SSV'10 Proceedings of the 5th international conference on Systems software verification
Encoding industrial hardware verification problems into effectively propositional logic
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Efficiently solving quantified bit-vector formulas
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Debugging the data plane with anteater
Proceedings of the ACM SIGCOMM 2011 conference
Encoding OCL data types for SAT-based verification of UML/OCL models
TAP'11 Proceedings of the 5th international conference on Tests and proofs
Sharing is caring: combination of theories
FroCoS'11 Proceedings of the 8th international conference on Frontiers of combining systems
Proceedings of the International Conference on Computer-Aided Design
Polynomial datapath optimization using constraint solving and formal modelling
Proceedings of the International Conference on Computer-Aided Design
Formal deadlock checking on high-level SystemC designs
Proceedings of the International Conference on Computer-Aided Design
Effective word-level interpolation for software verification
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Learning conditional abstractions
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
An alternative to SAT-Based approaches for bit-vectors
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
URBiVA: uniform reduction to bit-vector arithmetic
IJCAR'10 Proceedings of the 5th international conference on Automated Reasoning
Development and evaluation of LAV: an SMT-based error finding platform
VSTTE'12 Proceedings of the 4th international conference on Verified Software: theories, tools, experiments
LLBMC: bounded model checking of C and C++ programs using a compiler IR
VSTTE'12 Proceedings of the 4th international conference on Verified Software: theories, tools, experiments
DARWIN: An approach to debugging evolving programs
ACM Transactions on Software Engineering and Methodology (TOSEM)
Symbolic model checking on SystemC designs
Proceedings of the 49th Annual Design Automation Conference
r-TuBound: loop bounds for WCET analysis (tool paper)
LPAR'12 Proceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Exploiting step semantics for efficient bounded model checking of asynchronous systems
Science of Computer Programming
Symbolic loop bound computation for WCET analysis
PSI'11 Proceedings of the 8th international conference on Perspectives of System Informatics
SMT-aided combinatorial materials discovery
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
EPR-based bounded model checking at word level
IJCAR'12 Proceedings of the 6th international joint conference on Automated Reasoning
The system verification methodology for advanced TLM verification
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Constraint satisfaction over bit-vectors
CP'12 Proceedings of the 18th international conference on Principles and Practice of Constraint Programming
Efficiently solving quantified bit-vector formulas
Formal Methods in System Design
Being careful about theory combination
Formal Methods in System Design
QF BV model checking with property directed reachability
Proceedings of the Conference on Design, Automation and Test in Europe
Towards a generic verification methodology for system models
Proceedings of the Conference on Design, Automation and Test in Europe
Debugging of inconsistent UML/OCL models
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Twenty-Fourth ACM Symposium on Operating Systems Principles
ACM SIGOPS 24th Symposium on Operating Systems Principles
Towards optimization-safe systems: analyzing the impact of undefined behavior
Proceedings of the Twenty-Fourth ACM Symposium on Operating Systems Principles
Multi-solver support in symbolic execution
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
LCT: A Parallel Distributed Testing Tool for Multithreaded Java Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Modeling and debugging numerical constraints of cyber-physical systems design
Proceedings of the Fourth Symposium on Information and Communication Technology
Proof logging for computer algebra based SMT solving
Proceedings of the International Conference on Computer-Aided Design
Conquering the scheduling alternative explosion problem of SystemC symbolic simulation
Proceedings of the International Conference on Computer-Aided Design
Partial synthesis through sampling with and without specification
Proceedings of the International Conference on Computer-Aided Design
Array Theory of Bounded Elements and its Applications
Journal of Automated Reasoning
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Satisfiability Modulo Theories (SMT) is the problem of deciding satisfiability of a logical formula, expressed in a combination of first-order theories. We present the architecture and selected features of Boolector, which is an efficient SMT solver for the quantifier-free theories of bit-vectors and arrays. It uses term rewriting, bit-blasting to handle bit-vectors, and lemmas on demand for arrays.