NP is as easy as detecting unique solutions
STOC '85 Proceedings of the seventeenth annual ACM symposium on Theory of computing
Modeling design constraints and biasing in simulation using BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
k-means++: the advantages of careful seeding
SODA '07 Proceedings of the eighteenth annual ACM-SIAM symposium on Discrete algorithms
Stimulus generation for constrained random simulation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Random stimulus generation using entropy and XOR constraints
Proceedings of the conference on Design, automation and test in Europe
Application of Formal Word-Level Analysis to Constrained Random Simulation
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Boolector: An Efficient SMT Solver for Bit-Vectors and Arrays
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
A Markov Chain Monte Carlo Sampler for Mixed Boolean/Integer Constraints
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Random stimulus generation with self-tuning
CSCWD '09 Proceedings of the 2009 13th International Conference on Computer Supported Cooperative Work in Design
Towards efficient sampling: exploiting random walk strategies
AAAI'04 Proceedings of the 19th national conference on Artifical intelligence
Counting CSP solutions using generalized XOR constraints
AAAI'07 Proceedings of the 22nd national conference on Artificial intelligence - Volume 1
Simplifying Boolean constraint solving for random simulation-vector generation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
QuteRTL: towards an open source framework for RTL design synthesis and verification
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
A robust general constrained random pattern generator for constraints with variable ordering
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 50th Annual Design Automation Conference
| Hi-index | 0.00 |
Constrained random simulation is becoming the mainstream methodology in functional verification. In order to achieve the verification closure, a high-throughput and evenly-distributed constrained random pattern generator has become a must. In this paper, we propose a novel Range-Splitting heuristic and a Solution-Density Estimation technique (RSSDE) to partition sample space. The chosen cutting planes target to prune more infeasible subspaces so that the solution densities in other subspaces increase correspondingly. In addition, with statistics-based analyses, the estimated solution densities precisely predict the distribution of solutions. The intermediate statistical information is recorded in a range-splitting tree (RS-tree). By top-down random walking on the RS-tree, random pattern generation produces evenly-distributed patterns with high throughput. Experimental results show that our framework guarantees evenly-distributed stimuli and achieves more than 10X speedup in average when compared to a state-of-the-art commercial generator.