Advances in Petri nets 1986, part II on Petri nets: applications and relationships to other models of concurrency
UPPAAL—a tool suite for automatic verification of real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Symbolic execution and program testing
Communications of the ACM
Proceedings of the 38th annual Design Automation Conference
Dynamic partial-order reduction for model checking software
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Constructing efficient formal models from high-level descriptions using symbolic simulation
International Journal of Parallel Programming
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
Formal techniques for SystemC verification
Proceedings of the 44th annual Design Automation Conference
Formal verification of SystemC by automatic hardware/software partitioning
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
Partial order reduction for scalable testing of systemC TLM designs
Proceedings of the 45th annual Design Automation Conference
Model checking SystemC designs using timed automata
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
A temporal language for SystemC
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Boolector: An Efficient SMT Solver for Bit-Vectors and Arrays
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Race analysis for systemc using model checking
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Boosting lazy abstraction for systemc with partial order reduction
TACAS'11/ETAPS'11 Proceedings of the 17th international conference on Tools and algorithms for the construction and analysis of systems: part of the joint European conferences on theory and practice of software
Verifying SystemC: a software model checking approach
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Symbolic model checking on SystemC designs
Proceedings of the 49th Annual Design Automation Conference
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Due to the non-determinism of the SystemC scheduler, SystemC symbolic simulation faces a scalability issue. The issue stems from enumerating all scheduling alternatives such that all design behaviors can be captured assuredly. To conquer the scheduling alternative explosion problem, we first adopt symbolic partial order reduction to reduce the equivalent scheduling alternatives for exploration. Moreover, for those scheduling alternatives that cannot be reduced by partial order reduction, we merge their execution paths (and also states) into fewer ones to prevent the number of paths from explosion. The experimental results show that we achieve a tremendous scalability improvement by combining these two techniques together.