Low-latency factorization architecture for algebraic soft-decision decoding of Reed-Solomon codes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-throughput interpolation architecture for algebraic soft-decision Reed-Solomon decoding
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Backward interpolation architecture for algebraic soft-decision reed-solomon decoding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modified Low-Complexity Chase Soft-Decision Decoder of Reed---Solomon Codes
Journal of Signal Processing Systems
Efficient decoding of Reed-Solomon codes beyond half the minimum distance
IEEE Transactions on Information Theory
Algebraic soft-decision decoding of Reed-Solomon codes
IEEE Transactions on Information Theory
Algebraic Soft-Decision Decoding of Reed–Solomon Codes Using Bit-Level Soft Information
IEEE Transactions on Information Theory
Modified Low-Complexity Chase Soft-Decision Decoder of Reed---Solomon Codes
Journal of Signal Processing Systems
Efficient Generalized Minimum-distance Decoders of Reed-Solomon Codes
Journal of Signal Processing Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Algebraic soft-decision (ASD) decoders of Reed-Solomon (RS) codes can achieve significant coding gain with polynomial complexity. Most prior work on ASD decoder architecture design is for relatively short RS codes. However, one major application of RS codes, magnetic recording, usually requires a code length of 4Kbits or longer. For long RS codes, the low-complexity Chase (LCC) ASD decoding needs to interpolate over a large number of test vectors, which leads to long latency. This brief proposes a unified backward-forward interpolation scheme and a corresponding architecture for the LCC decoding. The proposed architecture can achieve almost twice the speed with only 40% area overhead. Another contribution of this brief is that the hardware complexity analysis for different ASD decoders is provided for the first time. For a (458, 410) RS code over GF(210), the proposed LCC decoder can achieve much higher efficiency in terms of speed-over-area ratio than other ASD decoders with similar error-correcting performance.