An FPGA-based fast classifier with high generalization property

Authors:
Tadayoshi Horita;Itsuo Takanami
Affiliations:
Polytechnic University, Sagamihara, Kanagawa, Japan;National College of Technology in former times, Iwate, Japan
Venue:
ACM SIGARCH Computer Architecture News
Year:
2011

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Abstract

This paper proposes a scheme to implement classifiers with high generalization properties on FPGAs. The classifiers consist of only combinational logic circuits, which are based on a simple concept, and the VHDL source files which describe the classifiers are generated by a C-language function, tuning VHDL notations for adders in them to reduce both its hardware size and computation time. Simulation results based on a character recognition are shown in terms of generalization property, hardware size, computation time, and electricity consumption.