The Design of Rijndael
An area optimized reconfigurable encryptor for AES-Rijndael
Proceedings of the conference on Design, automation and test in Europe
On the combination of self-organized systems to generate pseudo-random numbers
Information Sciences: an International Journal
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This paper reports an AES (Advances Encryption Standard) hardware architecture based on Programmable Cellular Automata (PCA) operated with a program. Verilog code has been designed for PCA and associated hardware modules to realize the AES functions. The PCA replaces the irregular logic circuit necessary for hardwired implementation of AES. The design has been simulated on Xilinx platform using ISE simulator.