Operating system concepts (2nd ed.)
Operating system concepts (2nd ed.)
Communicating sequential processes
Communicating sequential processes
The mutual exclusion problem: part I—a theory of interprocess communication
Journal of the ACM (JACM)
Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Computer networks
Design and validation of computer protocols
Design and validation of computer protocols
Guarded commands, nondeterminacy and formal derivation of programs
Communications of the ACM
Additional comments on a problem in concurrent programming control
Communications of the ACM
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Verification in XESAR of the Sliding Window Protocol
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
A Semantics Based Verification Tool for Finite State Systems
Proceedings of the IFIP WG6.1 Ninth International Symposium on Protocol Specification, Testing and Verification IX
Verification of Systolic Architecture Designs
PARLE '92 Proceedings of the 4th International PARLE Conference on Parallel Architectures and Languages Europe
| Hi-index | 0.00 |
We present a framework to specify and validate the design of message passing systems with synchronous or asynchronous communications. Our approach allows users to represent concurrent systems in a novel language and to justify the design automatically using the simulator. The method handles safety and deadlock properties. Concurrent systems are specified in an operational manner by transition systems. This tool is built for analyzing the logical consistency of communicating processes, specifically systolic-arrays and communication protocols. We describe how a systolic array and a communication protocol can be specified and justified with respect to its design.