Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Kleene's three valued logics and their children
Fundamenta Informaticae
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
Exploiting symmetry in temporal logic model checking
Formal Methods in System Design - Special issue on symmetry in automatic verification
Combining Partial Order and Symmetry Reductions
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Automatic Deductive Verification with Invisible Invariants
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Parameterized Verification of a Cache Coherence Protocol: Safety and Liveness
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Liveness with (0, 1, infty)-Counter Abstraction
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Reducing Model Checking of the Many to the Few
CADE-17 Proceedings of the 17th International Conference on Automated Deduction
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Three-Valued Spotlight Abstractions
FM '09 Proceedings of the 2nd World Congress on Formal Methods
The spotlight principle: on combining process-summarizing state abstractions
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Symmetry and completeness in the analysis of parameterized systems
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Symmetry reduction for b by permutation flooding
B'07 Proceedings of the 7th international conference on Formal Specification and Development in B
Symmetry-aware predicate abstraction for shared-variable concurrent programs
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Counterexample-guided abstraction refinement for symmetric concurrent programs
Formal Methods in System Design
The Journal of Supercomputing
Heuristic-guided abstraction refinement for concurrent systems
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
| Hi-index | 0.00 |
Parameterised model checking is concerned with verifying properties of arbitrary numbers of homogeneous processes composed in parallel. The problem is known to be undecidable in general. Nevertheless, a number of approaches have developed verification techniques for certain classes of parameterised systems. Here, we present an approach combining symmetry arguments with spotlight abstractions. The technique determines (the size of) a particular instantiation of the parameterised system from the given temporal logic formula, and feds this into an abstracting model checker. The degree of abstraction with respect to processes occurring during model checking determines whether the obtained result is also valid for all other instantiations. This enables us to prove safety as well as liveness properties (specified in full CTL) of parameterised systems on very small instantiations.