Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Reasoning about networks with many identical finite state processes
Information and Computation
A structural induction theorem for processes
Proceedings of the eighth annual ACM Symposium on Principles of distributed computing
Network grammars, communication behaviors and automatic verification
Proceedings of the international workshop on Automatic verification methods for finite state systems
Handbook of theoretical computer science (vol. B)
Reasoning about systems with many processes
Journal of the ACM (JACM)
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
POPL '95 Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Property preserving abstractions for the verification of concurrent systems
Formal Methods in System Design - Special issue on computer-aided verification (based on CAV'92 workshop)
Automatic verification of parameterized linear networks of processes
Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Abstracting WS1S Systems to Verify Parameterized Networks
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Transitive Closures of Regular Relations for Verifying Infinite-State Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Mona: Monadic Second-Order Logic in Practice
TACAS '95 Proceedings of the First International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Automatic Deductive Verification with Invisible Invariants
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Verifying Properties of Large Sets of Processes with Network Invariants
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Verifying Universal Properties of Parameterized Networks
FTRTFT '00 Proceedings of the 6th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Symbolic Model Checking with Rich ssertional Languages
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Handling Global Conditions in Parameterized System Verification
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automatic Verification of Parameterized Synchronous Systems (Extended Abstract)
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Reducing Model Checking of the Many to the Few
CADE-17 Proceedings of the 17th International Conference on Automated Deduction
Predicate abstraction with indexed predicates
ACM Transactions on Computational Logic (TOCL)
Going with the flow: parameterized verification using message flows
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Invariants for Parameterised Boolean Equation Systems
Theoretical Computer Science
Regular model checking without transducers (on efficient verification of parameterized systems)
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Proving ptolemy right: the environment abstraction framework for model checking concurrent systems
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
On symmetries and spotlights: verifying parameterised systems
ICFEM'10 Proceedings of the 12th international conference on Formal engineering methods and software engineering
Invisible safety of distributed protocols
ICALP'06 Proceedings of the 33rd international conference on Automata, Languages and Programming - Volume Part II
Counterexample guided invariant discovery for parameterized cache coherence verification
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Parameterized verification of deadlock freedom in symmetric cache coherence protocols
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Towards the formal verification of cache coherency at the architectural level
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Cubicle: a parallel SMT-based model checker for parameterized systems: tool paper
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
The Journal of Supercomputing
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In a previous paper we presented a method which allows to compute abstractions for parameterized systems modeled in the decidable logic WS1S. These WS1S systems provide an intuitive way to describe parameterized systems of finite state processes. The abstractions can be used to establish properties of the parameterized network. To be able to prove liveness properties, an algorithm is used which enriches the abstract system with fairness constraints. We summarize this verification method and present its application by the verification of both safety and liveness properties of a non-trivial example of a cache coherence protocol, provided by Steve German.