Efficient GHA-based hardware architecture for texture classification

  • Authors:
  • Shiow-Jyu Lin;Yi-Tsan Hung;Wen-Jyi Hwang

  • Affiliations:
  • Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan and Department of Electronic Engineering, National Ilan University, I-Lan, Taiwan;Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan;Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, Taiwan

  • Venue:
  • ICCCI'10 Proceedings of the Second international conference on Computational collective intelligence: technologies and applications - Volume Part II
  • Year:
  • 2010

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Abstract

This paper presents a novel hardware architecture based on generalized Hebbian algorithm (GHA) for texture classification. In the architecture, the weight vector updating process is separated into a number of stages for lowering area costs and increasing computational speed. Both the weight vector updating process and principle component computation process can also operate concurrently to further enhance the throughput. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an efficient design for attaining both high speed performance and low area costs.