FPGA-based nand flash memory error characterization and solid-state drive prototyping platform (abstract only)

Authors:
Yu Cai;Erich Haratsch;Mark McCartney;Mudit Bhargava;Ken Mai
Affiliations:
Carnegie Mellon University, Pittsburgh, USA;LSI Company, Allentown, PA, USA;Carnegie Mellon University, Pittsburgh, USA;Carnegie Mellon University, Pittsburgh, USA;Carnegie Mellon University, Pittsburgh, USA
Venue:
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Year:
2011

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Abstract

NAND Flash memory has been widely used for data storage due to its high density, high throughput, low cost, and low power. However, as the storage cells become smaller and with more bits programmed per cell, they are expected to suffer from reduced reliability and limited endurance. Wear-leveling and signal processing can significantly improve both reliability and endurance. However, finding optimal algorithms would require a quick and accurate characterization of Flash memory providing an insight into the error patterns. To this end, we have designed and implemented an FPGA-based framework for quick, accurate, and comprehensive characterization of Flash memories to allow efficient algorithm explorations.