A self-testing and calibration method for embedded successive approximation register ADC

Authors:
Xuan-Lun Huang;Ping-Ying Kang;Hsiu-Ming (Sherman) Chang;Jiun-Lang Huang;Yung-Fa Chou;Yung-Pin Lee;Ding-Ming Kwai;Cheng-Wen Wu
Affiliations:
GIEE, National Taiwan University, Taiwan;GIEE, National Taiwan University, Taiwan;University of California, Santa Barbara;GIEE, National Taiwan University, Taiwan;Industrial Technology Research Institute, Taiwan;Industrial Technology Research Institute, Taiwan;Industrial Technology Research Institute, Taiwan;Industrial Technology Research Institute, Taiwan
Venue:
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Year:
2011

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Abstract

This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4 LSBs; this significantly lowers the test circuitry complexity. Then, we develop a fully-digital missing code calibration technique that utilizes the proposed testing scheme to collect the required calibration information. Simulation results are presented to validate the proposed technique.