Digital architectures realizing piecewise-linear multivariate functions: Two FPGA implementations

Authors:
Marco Storace;Tomaso Poggi
Affiliations:
Biophysical and Electronic Engineering Department, University of Genoa, Via Opera Pia 11a, I-16145 Genova, Italy;Biophysical and Electronic Engineering Department, University of Genoa, Via Opera Pia 11a, I-16145 Genova, Italy
Venue:
International Journal of Circuit Theory and Applications
Year:
2011

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Abstract

Digital architectures for the circuit realization of multivariate piecewise-linear (PWL) functions are reviewed and compared. The output of the circuits is a digital word representing the value of the PWL function at the n-dimensional input. In particular, we propose two architectures with different levels of parallelism/complexity. PWL functions with n = 3 inputs are implemented on an FPGA and experimental results are shown. The accuracy in the representation of PWL functions is tested through three benchmark examples, two concerning three-variate static functions and one concerning a dynamical control system defined by a bi-variate PWL function. Copyright © 2009 John Wiley & Sons, Ltd.