Statecharts: A visual formalism for complex systems
Science of Computer Programming
Automated consistency checking of requirements specifications
ACM Transactions on Software Engineering and Methodology (TOSEM)
Embedded System Design: A Unified Hardware/Software Introduction
Embedded System Design: A Unified Hardware/Software Introduction
Hierarchical Concurrent Finite State Machines in Ptolemy
CSD '98 Proceedings of the 1998 International Conference on Application of Concurrency to System Design
A Practical Tutorial on Modified Condition/Decision Coverage
A Practical Tutorial on Modified Condition/Decision Coverage
Confirming Configurations in EFSM Testing
IEEE Transactions on Software Engineering
The Object Primer: Agile Model-Driven Development with UML 2.0
The Object Primer: Agile Model-Driven Development with UML 2.0
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Advanced Formal Verification
Digital Design: Principles and Practices (4th Edition)
Digital Design: Principles and Practices (4th Edition)
On the evaluation of transactor-based verification for reusing TLM assertions and testbenches at RTL
Proceedings of the conference on Design, automation and test in Europe: Proceedings
SpecCharts: a VHDL front-end for embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Context: A methodology is needed to model software specification with both timing diagram and Simulink/Stateflow (SL/SF) and to convert timing diagram model into SL/SF model. Objectives: This paper aims to propose a timing diagram drawing method and the algorithm to convert a timing diagram model into the equivalently behaving SL/SF model. Method: We add a few extra features to those of the typical timing diagrams. The extra features were chosen by the field engineers' requests and the survey of many different commercial models. This paper proposes the formal method to describe the timing diagram. Based on the formal description, the converting algorithm translates a timing diagram into the SL/SF model. Results: By providing a path from timing diagram to SL/SF, system specifications can be described with both SL/SF and timing diagram. This paper addresses the details of outcomes that the proposed method was successfully applied to modeling ''Theft watch system'' and ''Automotive power window controller. The proposed method has been successfully applied to other commercial systems, and to the models provided by Mathworks. Conclusion: This paper proposed a methodology to describe system specification with both timing diagram and SL/SF. The strategy might help designers more efficiently describe specifications. In addition, the mixed specification can be simulated in SL/SF, and the specification can utilize other third party SL/SF tools such as test case generation or model check utilities.