A Library Development Framework for a Coarse Grain Reconfigurable Architecture

Authors:
Omer Malik;Ahmed Hemani;Muhammad Ali Shami
Affiliations:
-;-;-
Venue:
VLSID '11 Proceedings of the 2011 24th International Conference on VLSI Design
Year:
2011

Citing 0
Cited 2

A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA

Proceedings of the First International Workshop on Many-core Embedded Systems
System level synthesis of hardware for DSP applications using pre-characterized function implementations

Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

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Abstract

A framework for efficiently capturing the rich micro architectural space of a substantial Matlab like library of DSP functions for a regular Coarse Grain Reconfigurable Architecture (CGRA) fabric is proposed. A subset of C has been proposed to model the DSP functions and an automatic tool to generate the configware for the CGRA fabric developed. A method to estimate the average energy of such functions is reported with error margin of less than 3%. Such a framework is proposed as the basis for raising the abstraction to automate synthesis of the entire physical layers.